Nano Processor
The Challenge
Understanding how a processor actually executes instructions requires building one, not reading about it — the project was to design a working custom processor from first principles and run it on real FPGA hardware.
My Approach
I designed and implemented a custom 8-register processor from scratch, extending a 4-bit base core into a 5-bit datapath with a dedicated ALU and a hardware multiplier. I built the instruction decoder for a 13-bit instruction set supporting immediate load, negation, conditional register-compare jumps, and ALU operations, plus a 7-segment display driver for on-board output.
Outcome
A working processor running on real Basys 3 FPGA hardware, with results visible on the on-board 7-segment display — and a much deeper understanding of how instructions map onto physical digital logic.